VHDL-AMS is a derivative of the hardware description languageVHDL (IEEE standard 1076-1993). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems (IEEE 1076.1-1999).
The VHDL-AMS standard was created with the intent of enabling designers of analog and mixed signal systems and integrated circuits to create and use modules that encapsulate high-level behavioral descriptions as well as structural descriptions of systems and components.
VHDL-AMS is an industry standard modeling language for mixed signal circuits. It provides both continuous-time and event-driven modeling semantics, and so is suitable for analog, digital, and mixed analog/digital circuits. It is particularly well suited for verification of very complex analog, mixed-signal and radio frequency integrated circuits.
It must be noted that VHDL is NOT a programming language. It is a hardware description language.
Code example
In VHDL-AMS, a design consists at a minimum of an entity which describes the interface and an architecture which contains the actual implementation. In addition, most designs import library modules. Some designs also contain multiple architectures and configurations.
A simple ideal diode in VHDL-AMS would look something like this:
-- (this is a VHDL comment)
-- import electrical_system from the disciplines library
library IEEE, disciplines;
use IEEE.math_real.all;
use disciplines.electrical_system.all;
-- this is the entity
entity DIODE is
generic (iss : REAL := 1.0e-14; -- Saturation current
af : REAL := 1.0; -- Flicker noise coefficient
kf : REAL := 0.0); -- Flicker noise exponent
port (terminal anode, cathode : electrical);
end entity DIODE;
architecture IDEAL of DIODE is
quantity v across i through anode to cathode;
constant vt : REAL := 0.0258; -- Thermal voltage at 300k
begin
i == iss * (exp(v/vt) - 1.0);
end architecture IDEAL;
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